Confidence Value: A Novel Evaluation Index of Side-Channel Attack -- Design of High Precision Band-Pass Sigma-Delta ADC in MEMS Gyroscope -- An Efficient Rule Processing Architecture Based on Reconfigurable Hardware -- Performance Analysis of Existing SIMD Architectures -- A coherent and power-efficient optical memory access network for kilo-core processor -- CoEM: A Software and Hardware Co-design Event Management System for Middlebox -- A Battery SOC Prediction Method Based on GA-CNN Network and Its Implementation on FPGA -- The Implementation of a Configurable MBIST Controller for Multi-core SoC -- Neuromodulation in Plastic Convolutional Neural Networks -- Structure Design of a Fully Enclosed Airborne Reinforcement Computer -- Design Discussion and Performance Research of the Third-level Cache in a Multi-socket, Multi-core Microchip -- An efficient and reliable retransmission mechanism for on-chip network of many-core processor -- Anti-vibration performance and Electromagnetic Compatibility Design for the Shipborne Reinforced Computer -- Effect of Passivating and Metallization Layers on Low Energy Proton Induced Single-Event Upset -- Design and Realization of Integrated Service Access Gateway (ISAG) for Integrated Fusion Shipboard network -- A Convolutional Neural Networks accelerator based on parallel memory -- RCTS: Random Cyclic Testing System -- Evaluation and Optimization of Interrupt Response Mechanism in RISC-V Architecture -- Numerical Analysis and Experimental Study on Heat Dissipation Performance of Sealed Rugged Server -- Design of High Performance Server for Shipboard Common Computing Applications -- Automated Deadlock Verification for On-chip Cache Coherence and Interconnects Through Extended Channel Dependency Graph.